基于FPGA的新型强弱混合型PUF电路设计

连佳娜; 汪鹏君; 李刚; 马雪娇; 翟官宝

doi:10.11959/j.issn.2096-109x.2021028

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基于FPGA的新型强弱混合型PUF电路设计

专题：集成电路硬件安全 | 更新时间：2024-06-03

- 基于FPGA的新型强弱混合型PUF电路设计
- Novel hybrid strong and weak PUF design based on FPGA
- 网络与信息安全学报 2021年7卷第2期页码：94-103
- 作者机构：
  
  1. 温州大学电气与电子工程学院，浙江温州 325000
  2. 温州大学计算机与人工智能学院，浙江温州 325000
  3. 温州大学瓯江学院，浙江温州 325000)
- 作者简介：
  
  [ "连佳娜（1996- ），女，浙江绍兴人，温州大学硕士生，主要研究方向为物理不可克隆函数攻击与防御。" ]
  [ "汪鹏君（1966- ），男，浙江宁波人，温州大学教授、博士生导师，主要研究方向为低功耗、高信息密度集成电路理论和设计技术、电路设计综合和优化技术、安全芯片理论和设计技术。" ]
  [ "李刚（1988- ），男，陕西汉中人，温州大学讲师，主要研究方向为密码芯片攻击和防御理论及其VLSI实现、存储计算、数字电路逻辑综合与优化。" ]
  [ "马雪娇（1991- ），女，河北秦皇岛人，主要研究方向为数字电路逻辑综合与优化、硬件混淆技术。" ]
  [ "翟官宝（1998- ），男，浙江衢州人，温州大学硕士生，主要研究方向为物理不可克隆函数攻击与防御。" ]
- 基金信息：
  
  国家重点研发计划;The National Key R＆D Program of China(2018YFB2202100);国家自然科学基金;The National Natural Science Foundation of China(61874078);国家自然科学基金;The National Natural Science Foundation of China(61904125);温州市基础性科研项目;Basic Scientific Research Project of Wenzhou(G20190006);温州市基础性科研项目;Basic Scientific Research Project of Wenzhou(G20190003)
- DOI：10.11959/j.issn.2096-109x.2021028
  中图分类号： TP309
- 网络首发：2021-04，
  
  纸质出版：2021-04-15
- 稿件说明：
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连佳娜, 汪鹏君, 李刚, 等. 基于FPGA的新型强弱混合型PUF电路设计[J]. 网络与信息安全学报, 2021,7(2):94-103.

Jiana LIAN, Pengjun WANG, Gang LI, et al. Novel hybrid strong and weak PUF design based on FPGA[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 94-103.
连佳娜, 汪鹏君, 李刚, 等. 基于FPGA的新型强弱混合型PUF电路设计[J]. 网络与信息安全学报, 2021,7(2):94-103. DOI： 10.11959/j.issn.2096-109x.2021028.

Jiana LIAN, Pengjun WANG, Gang LI, et al. Novel hybrid strong and weak PUF design based on FPGA[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 94-103. DOI： 10.11959/j.issn.2096-109x.2021028.

摘要

物理不可克隆函数（PUF，physically unclonable function）通过提取芯片制造过程中无法避免引入的工艺偏差，可产生具有随机性、唯一性和防篡改特性的特征密钥。通过对 PUF 电路结构和工作原理的研究，提出一种基于现场可编程门阵列（FPGA，field-programmable gate array）的新型强弱混合型 PUF （SWPUF，strong and weak PUF）电路设计方案。该PUF可根据激励的汉明重量(HW，hamming weight)灵活地配置为强PUF和弱PUF两种拓扑结构，解决强/弱PUF分立实现的局限性。此外，利用异或去相关技术进一步优化输出密钥的统计特性。所提PUF采用Xilinx Artix-7 FPGA（28 nm工艺）实现，利用Matlab结合MicroBlaze微控制器构建内建自测试平台（self-built test platform）。实验结果表明，该PUF具有良好的随机性（96.98%）、唯一性（99.64%）和可靠性（常温常压下96.6%）。逻辑回归分析进一步显示，在HW较小的情况下所提SWPUF比传统的Arbiter-PUF具有更好的抗攻击能力，可广泛应用于信息安全领域，如密钥存储（针对弱PUF）和设备认证（针对强PUF）。

Abstract

Physically unclonable function (PUF) can produce intrinsic keys with characteristics of randomness

uniqueness and tamper-proof by exploiting the process deviations which can not be avoided in the chip manufacturing process.A novel hybrid strong and weak PUF (SWPUF) circuit design based on field-programmable gate array(FPGA) was proposed after the investigation of the PUF circuit structures and principles.To address the limitation of designing strong-PUF and weak-PUF discretely

SWPUF could be configured into two topologies conveniently depending on the Hamming Weight (HW) of the challenges.In addition

the statistical characteristics of the responses could be further improved by a XOR-decorrelation technique.The proposed SWPUF was implemented on a Xilinx Artix-7 FPGA (28nm technology)

and a self-built test platform was set up by using Matlab and MicroBlaze microcontroller.Experimental results show that the SWPUF has good performances of randomness (96.98%)

uniqueness (99.64%) and reliability (96.6%).Logic register analysis also shows that the SWPUF has a better anti-attack capability than the traditional Arbiter-PUF in the case of with small HW

and can be used in the information security

such as key storage (especially to weak PUF) and device authentication (especially to strong PUF).

关键词

Keywords

references

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