基于在线计数的改进快速泄露评估

时争光; 郑梦策; 胡红钢; 俞能海

doi:10.11959/j.issn.2096-109x.2021017

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基于在线计数的改进快速泄露评估

学术论文 | 更新时间：2024-06-03

- 基于在线计数的改进快速泄露评估
- Improved fast leakage assessment based on online counting
- 网络与信息安全学报 2021年7卷第2期页码：141-150
- 作者机构：
  
  1. 中国科学院电磁空间信息重点实验室，安徽合肥 230027
  2. 中国科学技术大学网络空间安全学院，安徽合肥 230027
- 作者简介：
  
  [ "时争光（1994- ），男，河南开封人，中国科学技术大学硕士生，主要研究方向为密码学、侧信道分析与泄露评估。" ]
  [ "郑梦策（1990- ），男，浙江宁波人，博士，主要研究方向为应用密码学。" ]
  [ "胡红钢（1978- ），男，四川彭州人，中国科学技术大学教授、博士生导师，主要研究方向为密码学、编码、网络安全。" ]
  [ "俞能海（1964- ），男，安徽无为人，中国科学技术大学教授、博士生导师，主要研究方向为多媒体数据处理与分析和数字内容安全。" ]
- 基金信息：
  
  国家自然科学基金;The National Natural Science Foundation of China(61632013);国家自然科学基金;The National Natural Science Foundation of China(61972370);国家自然科学基金;The National Natural Science Foundation of China(62002335);中央高校基本科研业务费专项资金;Fundamental Research Funds for Central Universities in China(WK3480000007)
- DOI：10.11959/j.issn.2096-109x.2021017
  中图分类号： TP309
- 网络首发：2021-04，
  
  纸质出版：2021-04-15
- 稿件说明：
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时争光, 郑梦策, 胡红钢, 等. 基于在线计数的改进快速泄露评估[J]. 网络与信息安全学报, 2021,7(2):141-150.

Zhengguang SHI, Mengce ZHENG, Honggang HU, et al. Improved fast leakage assessment based on online counting[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 141-150.
时争光, 郑梦策, 胡红钢, 等. 基于在线计数的改进快速泄露评估[J]. 网络与信息安全学报, 2021,7(2):141-150. DOI： 10.11959/j.issn.2096-109x.2021017.

Zhengguang SHI, Mengce ZHENG, Honggang HU, et al. Improved fast leakage assessment based on online counting[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 141-150. DOI： 10.11959/j.issn.2096-109x.2021017.

摘要

快速泄露评估（FLA，fast leakage assessment）在2017年被提出，利用“计数”的思想极大地提升了计算效率。首先对快速泄露评估的性能进行分析，然后提出基于在线计数的方法对评估流程进行改进，并使用FPGA对该方法进行实现。根据实验结果对比，所提方法不仅可以减少评估中所需要占用的内存，而且能够缩短评估所用时间，使评估效率得到明显提升。

Abstract

Fast leakage assessment (FLA) was proposed in 2017

which made use of the idea of ＆quot;counter＆quot; and significantly improves the computing efficiency.The performance of FLA was analyzed

an online-counting based method was proposed to improve the evaluation flow

and the method was also validated via FPGA implementation.According to the comparisons of experimental results

the proposed method could not only decrease the required memory but also lower the runtime of the evaluation flow.Hence it can improve the evaluation efficiency significantly.

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Keywords

references

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