Design and detection of hardware Trojan based on satisfiability don't cares

Lingjuan WU; Jiacheng ZHU; Shibo TANG; Jing TAN; Wei HU

doi:10.11959/j.issn.2096-109x.2021025

您当前的位置：

首页 >

文章列表页 >

Design and detection of hardware Trojan based on satisfiability don't cares

Topic: Integrated Circuit Hardware Security | 更新时间：2024-06-03

- Design and detection of hardware Trojan based on satisfiability don't cares
- Chinese Journal of Network and Information Security Vol. 7, Issue 2, Pages: 35-42(2021)
- 作者机构：
  
  1. 西北工业大学网络空间安全学院，陕西西安710072
  2. 华中农业大学信息学院，湖北武汉430070
- 作者简介：
- 基金信息：
- DOI：10.11959/j.issn.2096-109x.2021025
  CLC： TP309
- Online First：2021-04，
  
  Published：15 April 2021
- 稿件说明：
移动端阅览
Lingjuan WU, Jiacheng ZHU, Shibo TANG, et al. Design and detection of hardware Trojan based on satisfiability don't cares[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 35-42.
DOI：

Lingjuan WU, Jiacheng ZHU, Shibo TANG, et al. Design and detection of hardware Trojan based on satisfiability don't cares[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 35-42. DOI： 10.11959/j.issn.2096-109x.2021025.

摘要

硬件木马是集成电路中隐含的恶意设计修改，被激活后可用于发起高效的底层攻击。由此，展示了一种新的利用可满足性无关项的轻量级高隐蔽性硬件木马安全威胁。该木马设计方法将轻量级木马设计隐藏于电路正常工作条件下无法覆盖到的可满足性无关项中，使插入木马后的电路设计与原始设计完全功能等价。攻击者只需利用简单的故障注入攻击手段即可激活木马。基于1024位RSA密码核的实验结果显示，所给出的木马设计能够逃避逻辑综合优化，通过故障注入攻击能够有效恢复RSA密码核的私钥。在此基础上，提出了一种能够有效检测该高隐蔽性木马设计的防御手段。

Abstract

Hardware Trojans are intended malicious design modifications to integrated circuits

which can be used to launch powerful low-level attacks after being activated.A new security threat of lightweight stealthy hardware Trojans leveraging discrete satisfiability don't care signals was demonstrated.These don't care could not be satisfied under normal operation and thus the circuit design with Trojan is functionally equivalent to the Trojan-free baseline.The attacker could activate the Trojan through simple yet effective fault injection.Experimental results on a 1024-bit RSA cryptographic core show that the proposed hardware Trojan can escape from logic synthesis optimization

and that the RSA private key can be retrieved by simply over-clocking the design.A defense technique that can effectively detect such stealthy Trojan design was provided.

关键词

Keywords

references

TEHRANIPOOR M , KOUSHANFAR F . A survey of hardware Trojan taxonomy and detection [J ] . IEEE Design ＆ Test of Computers , 2010 , 27 ( 1 ): 10 - 25 .

LI H , LIU Q , ZHANG J . A survey of hardware Trojan threat and defense [J ] . Integration , 2016 , 55 : 426 - 437 .

KARRI R , RAJENDRAN J , ROSENFELD K , et al . Trustworthy hardware:identifying and classifying hardware Trojans [J ] . Computer , 2010 , 43 ( 10 ): 39 - 46 .

BAUMGARTEN A , STEFFEN M , CLAUSMAN M , et al . A case study in hardware Trojan design and implementation [J ] . International Journal of Information Security , 2011 , 10 ( 1 ): 1 - 14 .

WAKSMAN A , SUOZZO M , SETHUMANDHAVAN S . FANCI:identification of stealthy malicious logic using Boolean functional analysis [C ] // Proceedings of the 2013 ACM SIGSAC Conference on Computer ＆ Communications Security . 2013 : 697 - 708 .

HICKS M , FINNICUM M , KING S T , et al . Overcoming an untrusted computing base:detecting and removing malicious hardware automatically [C ] // 2010 IEEE Symposium on Security and Privacy . 2010 : 159 - 172 .

STURTON C , HICKS M , WAGNER D , et al . Defeating UCI:building stealthy and malicious hardware [C ] // 2011 IEEE Symposium on Security and Privacy . 2011 : 64 - 77 .

ZHANG J , YUAN F , XU Q . Detrust:defeating hardware trust verification with stealthy implicitly-triggered hardware Trojans [C ] // Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security . 2014 : 153 - 166 .

ZHANG J , YUAN F , WEI L , et al . VeriTrust:verification for hardware trust [J ] . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2015 , 34 ( 7 ): 1148 - 1161 .

HAIDER S K , JIN C , AHMAD M , et al . Advancing the state-of-the-art in hardware Trojans detection [R ] . Cryptology ePrint Archive,Report .

FERN N , KULKARNI S , CHENG K T T . Hardware Trojans hidden in RTL don’t cares-automated insertion and prevention methodologies [C ] // 2015 IEEE International Test Conference (ITC) . 2015 : 1 - 8 .

FERN N , CHENG K T . Detecting hardware Trojans in unspecied functionality using mutation testing [C ] // 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) . 2015 : 560 - 566 .

NAHIYAN A , XIAO K , YANG K , et al . AVFSM:a framework for identifying and mitigating vulnerabilities in FSMs [C ] // Proceedings of the 53rd Annual Design Automation Conference . 2016 : 1 - 6 .

KRIEG C , WOLF C , JANTSCH A , et al . Toggle MUX:how X-optimism can lead to malicious hardware [C ] // 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC) . 2017 : 1 - 6 .

HU W , ZHANG L , ARDESHIRICHAM A , et al . Why you should care about don't cares:exploiting internal don't care conditions for hardware Trojans [C ] // 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) . 2017 : 707 - 713 .

MAHMOUD D G , HU W , STOJILOVIC M . X-attack:remote activation of satisfiability don't-care hardware Trojans on shared FPGAs [C ] // 2020 30th International Conference on Field Programmable Logic and Applications (FPL) . 2020 : 185 - 192 .

HU W , MA Y , WAND X , et al . Leveraging unspecified functionality in obfuscated hardware for Trojan and fault attacks [C ] // 2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) . 2019 : 1 - 6 .

DUBBAR C , QU G . Satisfiability don't care condition based circuit fingerprinting techniques [C ] // The 20th Asia and South Pacific Design Automation Conference . 2015 : 815 - 820 .

MAO B , HU W , ALTHOFF A , et al . Quantitative analysis of timing channel security in cryptographic hardware design [J ] . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2017 , 37 ( 9 ): 1719 - 1732 .

NARASIMHAN S , DU D , CHAKRABORTY R S , et al . Hardware Trojan detection by multiple-parameter side-channel analysis [J ] . IEEE Transactions on Computers , 2012 , 62 ( 11 ): 2183 - 2195 .

HU W , ARDESHIRICHAM A , GOBULUKOGLU M S , et al . Property specic information ow analysis for hardware security verication [C ] // Proceedings of the International Conference on Computer-Aided Design . 2018 : 1 - 8 .

HU W , MAO B , OBERG J , et al . Detecting hardware Trojans with gate-level information-flow tracking [J ] . Computer , 2016 , 49 ( 8 ): 44 - 52 .

ARDESHIRICHAM A , TAKASHIMA Y , GAO S , et al . Verisketch:Synthesizing secure hardware designs with timing-sensitive information flow properties [C ] // Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security (CCS) . 2019 : 1623 - 1638 .

Views

237

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Secure multidimensional interconnection network for the software defined system on wafer

Survey on generalized safety and security technology for system on wafer

Modeling and security analysis of hardware trojan attack based on GSCPN

Survey on model checking based hardware Trojan detection technology

Research on hardware Trojan defense

Related Author

MEI Bo

CAO Zhipeng

GUO Wei

SHEN Jianliang

LI Peijie

GUO Wei

ZHANG Wenbo

Related Institution

Information Engineering University

⁰