Novel level shifter based physical unclonable function circuit design

Lijuan HAN; Lei QIAN; Enyi YAO; Xin LOU; Yuan CAO; Yanhua LIU

doi:10.11959/j.issn.2096-109x.2021024

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Novel level shifter based physical unclonable function circuit design

Topic: Integrated Circuit Hardware Security | 更新时间：2024-06-03

- Novel level shifter based physical unclonable function circuit design
- Chinese Journal of Network and Information Security Vol. 7, Issue 2, Pages: 86-93(2021)
- 作者机构：
  
  1. 河海大学物联网工程学院，江苏常州 213022
  2. 华南理工大学微电子学院，广东广州 511442
  3. 人工智能与数字经济广东省实验室（广州），广东广州 511442
  4. 上海科技大学信息科学与技术学院，上海 201210
  5. 上海空间电源研究所，上海 200245
- 作者简介：
- 基金信息：
- DOI：10.11959/j.issn.2096-109x.2021024
  CLC： TN402
- Online First：2021-04，
  
  Published：15 April 2021
- 稿件说明：
移动端阅览
Lijuan HAN, Lei QIAN, Enyi YAO, et al. Novel level shifter based physical unclonable function circuit design[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 86-93.
DOI：

Lijuan HAN, Lei QIAN, Enyi YAO, et al. Novel level shifter based physical unclonable function circuit design[J]. Chinese Journal of Network and Information Security, 2021, 7(2): 86-93. DOI： 10.11959/j.issn.2096-109x.2021024.

摘要

提出一种基于通用交叉耦合电平转换器的低开销新型物理不可克隆函数的电路设计。该设计只需在传统电平转换电路中引入一个额外的开关晶体管，用来切换电平转换器的差分工作模式和共模工作模式，利用交叉耦合网络中两个 PMOS 晶体管由于开关速度不同所引起的输出电压的不确定性，通过共模模式输出获取所必需的熵值。该电路采用标准65 nm CMOS工艺进行设计，仿真结果显示该PUF的唯一性为49.11%，接近理想值。在电压为1.0～1.5V内，可靠性可达96.09%，而在环境温度为-20～100 ℃内，可靠性可达95.31%。同时在高速吞吐率为20Mbit/s时，每比特输出能耗仅为0.72 pJ（1.2 V，27 ℃）。

Abstract

Level shifters are widely used in low-power

multi-threshold integrated circuit chips.A novel physical unclonable function (PUF) design based on cross-coupled level shifter was proposed.In this work

a single switching transistor was inserted in the level shifter

which was the only overhead per response bit to change the operation mode of the cross-coupled level shifter from differential to common.The signature of the PUF was extracted while in common mode

by exploiting the uncertainty of the output voltage due to the difference of the switching time of the two PMOS in the cross-coupled network.Simulated with a standard 65 nm CMOS process

the results show the proposed PUF can produce a uniqueness of 49.11% and a reliability of 96.09% with the power supply voltage ranged from 1.0 V to 1.5 V and 95.31% with the temperature ranged from -20 ℃ to 100 ℃.The energy per bit is only 0.72 pJ at a high throughput of 20 Mbit/s (1.2 V

27 ℃).

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references

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